Respectfully Shadders, I cannot share your confidence in the receiver chip not being affected by jitter. As you well know in a SPDIF signal the clock signal is embedded with the data and the receiver chip has to extract this clock signal.....so jitter 'upstream' has to affect this process.
Hi,
The DAC receiver chip is not affected by the upstream jitter (unless there is a fault condition). The DAC receiver chip will synchronise to the incoming data stream using its own PLL, or it will be clocked by its own clock based on a crystal oscillator.. It is that PLL or crystal clock that defines the DAC digital receiver IC jitter on the audio data output to the DAC IC, not the upstream transport.
If the jitter on the data stream is so poor, then there will be slippage, and an audio value discarded, or there will be loss of synchronisation and muted audio until resynchronisation occurs.
The DAC receiver chip has a buffer, else it would not be able to decode the data stream to extract the audio bits from the framing, synchronisation and information bits.
From here, the data is passed to the DAC IC, which may, or may not, have its own crystal oscillator based clock.
If the DAC IC chip uses the digital receiver IC provided clock, then the specification of the digital receiver IC defines the jitter of the DAC overall, experienced by the user.
If the DAC IC chip uses its own crystal based oscillator, then that oscillator jitter defines the jitter of the DAC overall, experienced by the user.
Regards,
Shadders.